Customising Hardware Designs for Elliptic Curve Cryptography

This paper presents a method for producing hardware designs for Elliptic Curve Cryptography (ECC) systems over the finite field GF(2), using the optimal normal basis for the representation of numbers. A design generator has been developed which can automatically produce a customised ECC hardware design that meets user-defined requirements. This method enables designers to rapidly explore and implement a design with the best trade-offs in speed, size and level of security. To facilitate performance characterisation, we have developed formulæ for estimating the number of cycles for our generic ECC architecture. The resulting hardware implementations are among the fastest reported, and can often run several orders of magnitude faster than software implementations.